Voltage references in low-dropout regulators (LDOs), amplifiers, and analog-to-digital converters (ADCs) for nW systems, such as sensors and IoT devices, can tolerate ˜5% inaccuracy, but they require sub-nW power consumption. Conventional bandgap voltage references achieve excellent uniformity across process variation and temperature, but their complexity leads to μW range power, which is unacceptable for emerging nW microsystems. To achieve low power, one approach is to use a Vth-based voltage reference with devices biased in the sub-threshold region. However, these sub-nW voltage references make use of native transistors, which are potentially at different corners than normal devices due to distinct doping processes, making them more sensitive to process variations. Also, native transistors are not provided by all fabrication technologies and the output reference voltage is too low if an NMOS diode is used. Combining the native NMOS with stacked PMOS diodes can increase the reference voltage, but this further enlarges variation across corners.
For both bandgap references and the aforementioned sub-threshold references, post-fabrication trimming of each chip is required to alleviate the impact of process variations. However, this is a significant expense in cost-sensitive designs because of area overhead and testing complexity. In addition, non-volatile memory such as one-time-programmable (OTP) memory is required to store the trimming configuration information, requiring extra fabrication masks at increased cost. This paper proposes an ultra-low power PMOS-only voltage reference. By using only PMOS transistors, the reference has inherently low process variation. The untrimmed within-wafer σ/μ is 0.26%, and the untrimmed wafer-to-wafer σ/μ of 1.9%, which is sufficient for many applications in nW systems. With a 0.986V output reference voltage, the design can function down to 1.2V and consumes only 114 pW.
This section provides background information related to the present disclosure which is not necessarily prior art.